Senior / Engineer (Wafer Bumping R&D)
Posted 26 Oct, 2021
- To provide guidance for a team of process engineers in setup, qualification and production ramp up activities
- Responsible for setting up critical bumping recipe at PVD and Lithography process
- In-charge of lot dispositions and OCAP (Out-of-control Action Plan) executions for any deviating material.
- Lead continuous improvement projects & device qualifications using APQP approach.
- Working with QM (Quality Management Department on customer inquiries and issues responses.
- Execute CIP (Continuous Improvement Program) or project handling that contributes yield & cost efficiency improvement
- Ensure SPC (Statistical process Control) is maintain and in control
- Lead on new material evaluation and new process parameter setup
- To set up new devices and process according to customers requirements
- To perform process development activities, line optimisation and cost control particularly at Dry processes (i.e. Photolithography)
ANG MO KIO INDUSTRIAL PARK 2,,22, ,569506
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